Array of 64 purpose-built programmable processing elements
Standard-based 100 GbE, 40 GbE, 10 GbE, and 1 GbE support
Direct connect to optical modules
Large-scale hardware acceleration of key functions:
- Packet parsing and classification of packet headers
- ACL rules on-chip with external expansion via TCAM
- L2/L3/L4 table scalability with low-cost DDR3 SDRAM
- Counters/statistics support in deep on-chip memory
- RFC-2697/2698/4115- and MEF-compliant policers on-chip